Currently in a variety of TFT-LCD (thin film transistor—liquid crystal display) products, data lines are designed in as dual data lines to improve the frequency for outputting signal. As shown in FIG. 1, a display panel in LCD comprises an array substrate 1′. The array substrate 1′ comprises gate lines 20′ and data lines which are arranged on a substrate plate (not shown) and intersect to define sub-pixel units 30′. A thin film transistor 40′ and a pixel electrode 50′ are formed in each of the sub-pixel units 30′. The thin film transistor 40′ comprises a gate 40a′, a source 40b′, and a drain 40c′. The data lines comprise a first data line 61′ and a second data line 62′ which are arranged side by side between every two neighboring columns of sub-pixel units 50′. As shown, the first data line 61′ and the second data line 62′ are arranged in a same layer as the source 40b′ and drain 40c′ of the thin film transistor 40′. A dual-data-line short circuit (DDS) tends to occur between the first data line 61′ and the second data line 62′ which are arranged side by side. Especially in case a distance between the first data line 61′ and the second data line 62′ is relatively small, the problem of DDS become worse, which may lead to significant decrease in the yield of product.
Therefore, there is a desire for a display panel capable of preventing DDS in the art.